The Trend of Different Parameters for Designing Integrated Circuits from 1973 to 2019 and Linked to Moore's Law

The number of transistors per chip, feature sizes, frequencies, transistor densities, number of cores, thermal design powers, die areas, and storage capacities of Integrated Circuits (ICs) used for different processing units and memories were collected from various websites from 1973 to 2019 and plotted against year of introduction of ICs in semi-log paper to find the trend with R-squared (R) value using Microsoft Excel. The R values of the trend lines for the above parameters were over 0.922 which indicated that more than 92% of data satisfied the fitting lines except for thermal design power (R = 0.7) and die area (R = 0.4 to 0.6). It was observed that the growths of transistor counts, transistor densities, frequencies, and thermal design powers for different processing units were growing exponentially and doubled every 16.8 to 24 months from 1973 to 2019 except the growth of thermal design powers (TDP) and frequencies of ICs which were increased up to 2003. After that, the growth of TDP and frequencies are nearly linear up to the present day. The growth of the above parameters for ICs of different memories were a little faster, it was doubled every 14 to 16 months. The feature sizes shrunk 2 times every 18 months. A strong relation was found between feature sizes and transistor densities (R = 0.9) and observed that one fold of feature size decreased for the increasing of 2-3 folds of transistor densities. It was observed that different parameters for ICs designing from 1973 to 2019 kept pace with Moore's law. It may be concluded that the decrease of feature size, increasing of transistor count and transistor density in ICs design will follow Moore's law for some more years with the limitation of frequency and power of ICs.

Presently a modern IC consists of millions of transistors. During these 5 decades, the size, speed, and capacity of ICs have progressed enormously due to rapid advances in computer architecture and semiconductor technologies (Yung et al., 2002). Almost anything related to the semiconductor industry would be approximated a straight line when plotted on semi-log paper, and the number of transistors on a chip, integration complexity, power of computers and processor speeds would be doubled about every 1 to 2 years (Moore, 1965;Vangie, 2020;and Bajramovic, 2013).
Moore's law is a projection of a historical trend so the growth rate might not be continued for an indefinite period. International Technology Roadmap for Semiconductor (ITRS) predicted that the growth would be slow around 2103 (Hoefflinger, 2011). Jorgenson et al. (2014) stated that Moore's law is dying in the next decade. Therefore, research was undertaken to examine the trend of different parameters for designing integrated circuits from 1973 to 2019 and linked to Moore's law.

MATERIALS AND METHODS:
Transistor counts, feature sizes, die areas, clock speeds, thermal design powers (TDP), number of cores, etc. of different type of processing units released from 1973 to 2019 by different manufactures (AKM, AMD, Fairchild, Fujitsu, General Instrument, General Microelectronics, Hitachi, Honeywell, Hyundai, IBM, Intel, Matsushita, Mitsubishi, NEC, NTT, Samsung, Sandisk, SDS, Seeq, Siemens, Signetics, Toshiba, Transitron) were collected from different websites (Wikipedia, 2020c; Wikipedia, 2020d; Martin, 2019; and Wikipedia, 2020e) and plotted these as a dependent variable against the year of introduction of ICs as an independent variable.
The capacities of Random-Access Memory (RAM), Read-Only Memory (ROM), and Flash Memories (FL) released by different manufacturers at various times were also collected from the above sources. Exponential trend lines with R-squared values of different parameters of ICs were plotted on semi-log paper with the Microsoft Excel program. R-Squared values were determined to observe the variation of a dependent variable with the independent variable. If the value of R 2 is very close to 1, the movements of the data of dependent variables are completely explained by the movements of the year of introduction of ICs. The number of months was counted for 10 times increase or decrease from trend lines of different parameters of ICs to find the growth rates and linked to Moore's law.

RESULTS AND DISCUSSIONS:
There were 2300 transistors per chip for Intel-4004 in 1971 but it became 23.6 billion transistors per chip at Graphcore GC2 IPU in 2018 (Wikipedia, 2020c). Thus the number of transistors per chip for the Central Processing Unit (CPU) has been increased 9,440,000 times in 47 years. NEC developed µPD7220-GDC graphics processing unit with 40,000 transistors in 1982 (Wikipedia, 2020c; Dampf, 1986)  It is also observed from the Fig 1 that the transistor counts for all types of processing units are increased exponentially. The R 2 values of exponential lines of CPU, GPU, and FPGA are 0.930, 0.961, and 0.958 respectively. These results indicate that more than 93% of data follow the movement of exponential trend lines. It was also found that the number of transistors doubled every 18.00, 17.76, and 20.40 months for CPU, GPU, and FPGA respectively. These results indicate that the transistors' growth per chip is still following Moore's law.
The number of transistors per chip, feature sizes, and die areas for CPU, GPU, and FPGA were plotted on semi-log paper against the year of introduction of ICs and found the exponential trend lines (Fig 2). It is observed that the exponential trend lines fit strongly for transistor count (R 2 = 0.953) and feature size (R 2 = 0.980). However, the die area does not fit UniversePG l www.universepg.com 18 well (R 2 = 0.387) with the exponential trend line. The process technology or feature size has rapidly shrunk from 10,000 nm at Intel4004 in 1971 to 5 nm at Samsung 5LPE in 2019 (Scotten, 2018   The exponential trend line of transistor densities (TD) for CPU, GPU, and FPGA against release date of ICs was determined (Fig 3) and it was found that TD was doubled every 28 months for considering data from 1969 to 2019. However, the transistor densities were doubled every 18 months when data were considered from 1987 to 2019. This result indicates that Moore's law is still applicable to the growth of transistor densities. An excellent relation (R 2 = 0.984) was found between the feature size and transistor densities for CPU, GPU, and FPGA. It was found that 1 fold of feature size was decreased for the increasing of 2 times of transistor densities (Fig  4).    The transistor densities of memories were plotted against the year of introduction (Fig 7) and find the exponential trend line (R 2 = 0.968). Fig 7 shows the relation between transistor densities of memories and the year of introduction. It was found that the transistor density doubles every 15.12 months and holds Moore's law. A strong relation was found between transistor count and processing technology of the ICs of different memories (R² = 0.957). The feature size was decreased sharply with the increase of transistor count (Fig 8). It was found from the trend line that the feature size reduced 1 fold per 3 time's increase of transistor count. The characteristic of trend lines of different parameters of ICs and linked to Moore's law is presented in Table 1.
(C = Capacity of memory in bits, T = Transistor count of different memories, & FLM =Flash memory) Fig 6: Capacity, transistor count, feature size, and die area of various memories over time.    (Fox, 2018) due to the "Power Wall-a barrier to clock speed" (Blank, 2018). The process of technology rapidly decreased from 10,000 nm in 1971 to 5 nm in 2019. It shrinks 2 times every 18 months and indicates keep pace with Moore's law up to this date. Samsung and TSMC have planned to manufacture 3 nm GAAFET nodes by 2021-2022 (Armasu, 2019). Moore's law might exist in the next few years since the transistor count is increasing and the feature size is decreasing. However, high power dissipation becomes a critical barrier to the frequency and performance of the microprocessor. It may be concluded that the decreasing of feature size and increasing transistor counts, transistor densities would continue some more years as also predicted by different researchers (Eide, 2018).